Switching Theory And Logic Design Tuition For B.Tech In Delhi NCR
Switching Theory And Logic Design Tuition For B.Tech In Delhi NCR. The Objective Of The Paper Is To Facilitate The Student With The Knowledge Of Logic Systems And Circuits, Thereby Enabling The Student To Obtain The Platform For Studying Digital Systems And Computer Architecture. Number Systems And Codes:- Decimal, Binary, Octal And Hexadecimal Number Systems, Codes- BCD, Gray Code, Excess-3 Code, ASCII, EBCDIC, Conversion Between Various Codes.
Switching Theory: - Boolean Algebra- Postulates And Theorems, De‟ Morgan‟S Theorem, Switching Functions- Canonical Forms- Simplification Of Switching Functions- Karnaugh Map And Quine Mc-Clusky Methods.
Combinational Logic Circuits:- Review Of Basic Gates- Universal Gates, Adder, Subtractor ,Serial Adder, Parallel Adder- Carry Propagate Adder, Carry Look-Ahead Adder, Carry Save Adder, Comparators, Parity Generators, Decoder And Encoder, Multiplexer And De-Multiplexer, ALU, PLA And PAL. Integrated Circuits: - TTL And CMOS Logic Families And Their Characteristics. Brief Introduction To RAM And ROM.
Sequential Logic Circuits: - Latches And Flip Flops- SR, , D, T And MS-JK Flip Flops, Asynchronous Inputs.
Counters And Shift Registers:- Design Of Synchronous And Asynchronous Counters:- Binary, BCD, Decade And Up/Down Counters , Shift Registers, Types Of Shift Registers, Counters Using Shift Registers- Ring Counter And Johnson Counter. Synchronous Sequential Circuits:- State Tables State Equations And State Diagrams, State Reduction And State Assignment, Design Of Clocked Sequential Circuits Using State Equations.
Finite State Machine-Capabilities And Limitations, Mealy And Moore Models-Minimization Of Completely Specified And Incompletely Specified Sequential Machines, Partition Techniques And Merger Chart Methods-Concept Of Minimal Cover Table. Algorithmic State Machine: Representation Of Sequential Circuits Using ASM Charts Synthesis Of Output And Next State Functions, Data Path Control Path Partition-Based Design.
Fault Detection And Location: Fault Models For Combinational And Sequential Circuits, Fault Detection In Combinational Circuits; Homing Experiments, Distinguishing Experiments, Machine Identification And Fault Detection Experiments In Sequential Circuits.
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